Computer Syllabus

                                         Computer Organisation and Architecture  
                                                                             
                                                          UNIT-I
Central Processing Unit:Von Neumann Machine(IAS Computer),Operational Flow Chart(Fetch,Execute) Instruction Cycle,Organisation of CPU,Hardwired and Micro programmed Control Unit,General Register Organisation;Stack Organisation,Instruction format and addressing Modes,Data transfer and Data manipulation,Program Contro,CISC vs RISC.

                                                            UNIT-II
Control Unit:Control memory,Address sequencing,Micro program example,Design of Control Unit
I/O Oganisation:Strobe based and hand shake based communications;Modes of Transfer,Vector and priority interrupt,DMA based data transfer.

                                                            UNIT-III
Memory Organisation:Memory Parameters,Classification of memory,Basic cell of Static and Dynamic RAM,Building large memories using chips,ROM logic,Associative Memory,Cache Memory Organisation,Virtual Memory.

                                                           UNIT-IV
pipeline and vector processing:Parallel Processing,Pipelining,Arithemetic pipeline,Instruction Pipeline,RISC Pipeline,Vector processors,Multiprocessors;Characteristics,Interconnection Structures.

                                                           UNIT-V
Processor Architecture:Component of Microprocessor,I/O parts,16-bit(8086) Architecture,32-Bit(80486) Architecture,Super Scalar Architecture in Pentium Processor,64-Bit (Pentium Dual-Core) Architecture.